Preface |
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xiii | |
CHAPTER 1 Characteristics and Construction of Printed Wiring Boards |
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1 | (16) |
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1 | (1) |
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1 | (1) |
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2 | (5) |
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3 | (1) |
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1.3.2 Alternate Resin Systems |
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3 | (2) |
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5 | (1) |
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1.3.4 Variability in Building Stackups |
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6 | (1) |
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1.3.5 Mixing Laminate Types |
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7 | (1) |
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7 | (3) |
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8 | (1) |
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1.4.2 Copper Weights and Thickness |
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9 | (1) |
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1.4.3 Plating the Surface Traces |
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9 | (1) |
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1.4.4 Trace Etch Shape Effects |
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9 | (1) |
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10 | (4) |
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13 | (1) |
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1.6 Surface Finishes and Solder Mask |
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14 | (1) |
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14 | (1) |
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15 | (2) |
CHAPTER 2 Resistance of Etched Conductors |
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17 | (14) |
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17 | (1) |
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2.2 Resistance at Low Frequencies |
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17 | (3) |
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2.3 Loop Resistance and the Proximity Effect |
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20 | (4) |
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21 | (1) |
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22 | (2) |
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2.4 Resistance Increase with Frequency: Skin Effect |
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24 | (3) |
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2.5 Hand Calculations of Frequency-Dependent Resistance |
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27 | (2) |
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2.5.1 Return Path Resistance |
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28 | (1) |
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2.5.2 Conductor Resistance |
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28 | (1) |
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2.5.3 Total Loop Resistance |
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29 | (1) |
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2.6 Resistance Increase Due to Surface Roughness |
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29 | (1) |
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30 | (1) |
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30 | (1) |
CHAPTER 3 Capacitance of Etched Conductors |
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31 | (16) |
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31 | (1) |
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3.2 Capacitance and Charge |
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31 | (2) |
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3.2.1 Dielectric Constant |
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32 | (1) |
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3.3 Parallel Plate Capacitor |
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33 | (2) |
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3.4 Self and Mutual Capacitance |
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35 | (2) |
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37 | (2) |
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39 | (4) |
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3.6.1 Reactance and Displacement Current |
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40 | (1) |
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40 | (1) |
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3.6.3 Calculating Loss Tangent and Conductance G |
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41 | (2) |
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3.7 Environmental Effects on Laminate epsilon, and Loss Tangent |
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43 | (2) |
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3.7.1 Temperature Effects |
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44 | (1) |
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44 | (1) |
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45 | (1) |
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45 | (2) |
CHAPTER 4 Inductance of Etched Conductors |
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47 | (20) |
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47 | (1) |
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47 | (4) |
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48 | (1) |
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48 | (1) |
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4.2.3 Internal and External Inductance |
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49 | (1) |
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49 | (1) |
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4.2.5 Reciprocity Principal and Transverse Electromagnetic Mode |
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50 | (1) |
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4.3 Circuit Behavior of Inductance |
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51 | (4) |
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4.3.1 Inductive Voltage Drop |
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53 | (1) |
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4.3.2 Inductive Reactance |
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54 | (1) |
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55 | (1) |
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4.4.1 Using the Reciprocity Principle to Obtain the Inductance Matrix from a Capacitance Matrix |
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55 | (1) |
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55 | (5) |
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4.5.1 Coupling Coefficient |
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56 | (1) |
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4.5.2 Beneficial Effects of Mutual Inductance |
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57 | (2) |
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4.5.3 Deleterious Effects of Mutual Inductance |
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59 | (1) |
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4.6 Hand Calculations for Inductance |
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60 | (4) |
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4.6.1 Inductance of a Wire Above a Return Plane |
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60 | (1) |
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4.6.2 Inductance of Side-by-Side Wires |
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61 | (1) |
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4.6.3 Inductance of Parallel Plates |
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61 | (2) |
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4.6.4 Inductance of Microstrip |
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63 | (1) |
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4.6.5 Inductance of Stripline |
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63 | (1) |
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64 | (1) |
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65 | (2) |
CHAPTER 5 Transmission Lines |
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67 | (20) |
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67 | (1) |
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5.2 General Circuit Model of a Lossy Transmission Line |
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67 | (4) |
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5.2.1 Relationship Between ωL and R |
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70 | (1) |
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5.2.2 Relationship Between ωC and G |
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70 | (1) |
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71 | (2) |
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5.3.1 Calculating Impedance |
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72 | (1) |
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73 | (9) |
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5.4.1 Propagation Constant |
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74 | (1) |
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5.4.2 Phase Shift, Delay, and Wavelength |
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75 | (3) |
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5.4.3 Phase Constant at High Frequencies When R and G Are Small |
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78 | (1) |
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79 | (1) |
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5.4.5 Neper and Decibel Conversion |
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80 | (2) |
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5.5 Summary and Worked Examples |
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82 | (4) |
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86 | (1) |
CHAPTER 6 Return Paths and Power Supply Decoupling |
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87 | (30) |
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87 | (1) |
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87 | (3) |
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6.2.1 Return Paths of Ground-Referenced Signals |
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89 | (1) |
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90 | (1) |
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6.3 Stripline Routed Between Power and Ground Planes |
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90 | (5) |
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6.3.1 When Power Plane Voltage Is the Same as Signal Voltage |
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90 | (3) |
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6.3.2 When Power Plane Voltage Differs from Signal Voltage |
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93 | (1) |
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6.3.3 Power System Inductance |
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94 | (1) |
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6.4 Split Planes, Motes, and Layer Changes |
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95 | (3) |
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95 | (3) |
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98 | (1) |
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6.5 Connectors and Dense Pin Fields |
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98 | (7) |
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99 | (1) |
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99 | (3) |
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102 | (1) |
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6.5.4 Guidelines for Routing Through Dense Pin Fields |
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103 | (2) |
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6.6 Power Supply Bypass/Decoupling Capacitance |
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105 | (7) |
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6.6.1 Power Supply Integrity |
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106 | (4) |
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6.6.2 Distributed Power Supply Interconnect Model |
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110 | (2) |
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6.7 Connecting to Decoupling Capacitors |
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112 | (2) |
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112 | (2) |
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114 | (1) |
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115 | (2) |
CHAPTER 7 Serial Communication, Loss, and Equalization |
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117 | (32) |
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117 | (1) |
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7.2 Harmonic Contents of a Data Stream |
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117 | (8) |
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119 | (1) |
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7.2.2 Combining Harmonics to Create a Pulse |
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120 | (2) |
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7.2.3 The Fourier Integral |
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122 | (1) |
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7.2.4 Rectangular Pulses with Nonzero Rise Times |
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123 | (2) |
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125 | (1) |
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7.4 Bit Rate and Data Rate |
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126 | (2) |
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7.5 Block Codes Used in Serial Transmission |
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128 | (2) |
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130 | (2) |
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130 | (1) |
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131 | (1) |
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132 | (2) |
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7.8 Equalization and Preemphasis |
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134 | (6) |
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134 | (3) |
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137 | (2) |
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7.8.3 Passive RC Equalizer |
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139 | (1) |
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7.9 DC-Blocking Capacitors |
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140 | (5) |
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7.9.1 Calculating the Coupling Capacitor Value |
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142 | (3) |
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145 | (1) |
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146 | (3) |
CHAPTER 8 Single-Ended and Differential Signaling and Crosstalk |
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149 | (36) |
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149 | (1) |
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149 | (9) |
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8.2.1 Circuit Description of Odd and Even Modes |
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150 | (3) |
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8.2.2 Coupling Coefficient |
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153 | (2) |
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8.2.3 Stripline and Microstrip Odd- and Even-Mode Timing |
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155 | (2) |
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8.2.4 Effects of Spacing on Impedance |
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157 | (1) |
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8.3 Multiconductor Transmission Lines |
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158 | (7) |
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8.3.1 Bus Segmentation for Simulation Purposes |
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159 | (1) |
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8.3.2 Switching Behavior of a Wide Bus |
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160 | (1) |
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8.3.3 Simulation Results for Loosely Coupled Lines |
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161 | (1) |
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8.3.4 Simulation Results for Tightly Coupled Lines |
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162 | (2) |
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8.3.5 Data-Dependent Timing Jitter in Multiconductor Transmission Lines |
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164 | (1) |
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8.4 Differential Signaling, Termination, and Layout Rules |
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165 | (8) |
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8.4.1 Differential Signals and Noise Rejection |
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165 | (1) |
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8.4.2 Differential Impedance and Termination |
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166 | (4) |
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8.4.3 Reflection Coefficient and Return Loss |
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170 | (2) |
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8.4.4 PWB Layout Rules When Routing Differential Pairs |
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172 | (1) |
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173 | (9) |
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8.5.1 Coupled-Line Circuit Model |
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175 | (2) |
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8.5.2 NEXT and FEXT Coupling Factors |
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177 | (1) |
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8.5.3 Using K, to Predict NEXT |
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178 | (1) |
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8.5.4 Using Kf to Predict FEXT |
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179 | (1) |
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179 | (1) |
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8.5.6 Crosstalk Worked Example |
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180 | (2) |
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182 | (1) |
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182 | (1) |
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183 | (2) |
CHAPTER 9 Characteristics of Printed Wiring Stripline and Microstrips |
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185 | (24) |
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185 | (1) |
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185 | (8) |
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186 | (1) |
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9.2.2 Impedance Relationship Between Trace Width, Thickness, and Plate Spacing |
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187 | (2) |
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9.2.3 Mask Biasing to Obtain a Specific Impedance |
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189 | (1) |
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9.2.4 Hand Calculation of ZO |
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189 | (2) |
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9.2.5 Stripline Fabrication |
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191 | (2) |
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193 | (4) |
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194 | (2) |
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9.3.2 Solder Mask and Embedded Microstrip |
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196 | (1) |
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9.4 Losses in Stripline and Microstrip |
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197 | (4) |
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199 | (1) |
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199 | (2) |
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9.5 Microstrip and Stripline Differential Pairs |
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201 | (5) |
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9.5.1 Broadside Coupled Stripline |
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201 | (3) |
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9.5.2 Edge-Coupled Stripline |
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204 | (1) |
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9.5.3 Edge-Coupled Microstrip |
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205 | (1) |
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206 | (1) |
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207 | (2) |
CHAPTER 10 Surface Mount Capacitors |
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209 | (22) |
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209 | (1) |
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10.2 Ceramic Surface Mount Capacitors |
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209 | (14) |
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10.2.1 Dielectric Temperature Characteristics Classification |
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209 | (2) |
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211 | (1) |
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10.2.3 Frequency Response |
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212 | (2) |
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10.2.4 Inductive Effects: ESL |
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214 | (1) |
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10.2.5 Dielectric and Conductor Losses: ESR |
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215 | (3) |
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10.2.6 Leakage Currents: Insulation Resistance |
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218 | (1) |
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219 | (1) |
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10.2.8 MLCC Capacitor Aging |
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220 | (1) |
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10.2.9 Capacitance Change with DC Bias and Frequency |
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221 | (1) |
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10.2.10 MLCC Usage Guidelines |
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222 | (1) |
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10.3 SMT Tantalum Capacitors |
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223 | (5) |
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223 | (1) |
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10.3.2 Frequency Response |
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224 | (1) |
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225 | (1) |
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225 | (1) |
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10.3.5 Effects of DC Bias, Temperature, and Relative Humidity |
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225 | (1) |
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10.3.6 Failure of Tantalum Capacitors |
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226 | (1) |
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10.3.7 ESR and Self Heating: Voltage and Temperature Derating |
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227 | (1) |
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227 | (1) |
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10.4 Replacing Tantalum with High-Valued Ceramic Capacitors |
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228 | (2) |
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230 | (1) |
Appendix: Conversion Factors |
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231 | (2) |
About the Author |
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233 | (2) |
Index |
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235 | |