Atnaujinkite slapukų nuostatas

El. knyga: High Speed Circuit Board Signal Integrity

  • Formatas: 257 pages
  • Išleidimo metai: 31-Jan-2003
  • Leidėjas: Artech House Publishers
  • ISBN-13: 9781580538466
Kitos knygos pagal šią temą:
  • Formatas: 257 pages
  • Išleidimo metai: 31-Jan-2003
  • Leidėjas: Artech House Publishers
  • ISBN-13: 9781580538466
Kitos knygos pagal šią temą:

DRM apribojimai

  • Kopijuoti:

    neleidžiama

  • Spausdinti:

    neleidžiama

  • El. knygos naudojimas:

    Skaitmeninių teisių valdymas (DRM)
    Leidykla pateikė šią knygą šifruota forma, o tai reiškia, kad norint ją atrakinti ir perskaityti reikia įdiegti nemokamą programinę įrangą. Norint skaityti šią el. knygą, turite susikurti Adobe ID . Daugiau informacijos  čia. El. knygą galima atsisiųsti į 6 įrenginius (vienas vartotojas su tuo pačiu Adobe ID).

    Reikalinga programinė įranga
    Norint skaityti šią el. knygą mobiliajame įrenginyje (telefone ar planšetiniame kompiuteryje), turite įdiegti šią nemokamą programėlę: PocketBook Reader (iOS / Android)

    Norint skaityti šią el. knygą asmeniniame arba „Mac“ kompiuteryje, Jums reikalinga  Adobe Digital Editions “ (tai nemokama programa, specialiai sukurta el. knygoms. Tai nėra tas pats, kas „Adobe Reader“, kurią tikriausiai jau turite savo kompiuteryje.)

    Negalite skaityti šios el. knygos naudodami „Amazon Kindle“.

Discussing both design and debugging issues at gigabit-per-second data rates, this book serves as a practical reference for projects involving high-speed serial signaling on printed wiring boards. Formulas, terminology, and a refresher on basic electrostatic and electromagnetic principals will be useful for signal integrity engineers. High-speed circuit designers will find an entry into the electromagnetics and physics of high-speed signaling. The book introduces concepts fundamental to high-speed signaling, such as lossy transmission line behavior, skin effect, and characteristics of laminates. Focus is on the effects of dielectric and conductor loss on signal quality, with particular emphasis on serial differential signaling. Thierauf is a scientist in the private sector. Annotation ©2004 Book News, Inc., Portland, OR (booknews.com)
Preface xiii
CHAPTER 1 Characteristics and Construction of Printed Wiring Boards 1(16)
1.1 Introduction
1(1)
1.2 Unit System
1(1)
1.3 PWB Construction
2(5)
1.3.1 Resins
3(1)
1.3.2 Alternate Resin Systems
3(2)
1.3.3 Reinforcements
5(1)
1.3.4 Variability in Building Stackups
6(1)
1.3.5 Mixing Laminate Types
7(1)
1.4 PWB Traces
7(3)
1.4.1 Copper Cladding
8(1)
1.4.2 Copper Weights and Thickness
9(1)
1.4.3 Plating the Surface Traces
9(1)
1.4.4 Trace Etch Shape Effects
9(1)
1.5 Vias
10(4)
1.5.1 Via Aspect Ratio
13(1)
1.6 Surface Finishes and Solder Mask
14(1)
1.7 Summary
14(1)
References
15(2)
CHAPTER 2 Resistance of Etched Conductors 17(14)
2.1 Introduction
17(1)
2.2 Resistance at Low Frequencies
17(3)
2.3 Loop Resistance and the Proximity Effect
20(4)
2.3.1 Resistance Matrix
21(1)
2.3.2 Proximity Effect
22(2)
2.4 Resistance Increase with Frequency: Skin Effect
24(3)
2.5 Hand Calculations of Frequency-Dependent Resistance
27(2)
2.5.1 Return Path Resistance
28(1)
2.5.2 Conductor Resistance
28(1)
2.5.3 Total Loop Resistance
29(1)
2.6 Resistance Increase Due to Surface Roughness
29(1)
2.7 Summary
30(1)
References
30(1)
CHAPTER 3 Capacitance of Etched Conductors 31(16)
3.1 Introduction
31(1)
3.2 Capacitance and Charge
31(2)
3.2.1 Dielectric Constant
32(1)
3.3 Parallel Plate Capacitor
33(2)
3.4 Self and Mutual Capacitance
35(2)
3.5 Capacitance Matrix
37(2)
3.6 Dielectric Losses
39(4)
3.6.1 Reactance and Displacement Current
40(1)
3.6.2 Loss Tangent
40(1)
3.6.3 Calculating Loss Tangent and Conductance G
41(2)
3.7 Environmental Effects on Laminate epsilon, and Loss Tangent
43(2)
3.7.1 Temperature Effects
44(1)
3.7.2 Moisture Effects
44(1)
3.8 Summary
45(1)
References
45(2)
CHAPTER 4 Inductance of Etched Conductors 47(20)
4.1 Introduction
47(1)
4.2 Field Theory
47(4)
4.2.1 Permeability
48(1)
4.2.2 Inductance
48(1)
4.2.3 Internal and External Inductance
49(1)
4.2.4 Partial Inductance
49(1)
4.2.5 Reciprocity Principal and Transverse Electromagnetic Mode
50(1)
4.3 Circuit Behavior of Inductance
51(4)
4.3.1 Inductive Voltage Drop
53(1)
4.3.2 Inductive Reactance
54(1)
4.4 Inductance Matrix
55(1)
4.4.1 Using the Reciprocity Principle to Obtain the Inductance Matrix from a Capacitance Matrix
55(1)
4.5 Mutual Inductance
55(5)
4.5.1 Coupling Coefficient
56(1)
4.5.2 Beneficial Effects of Mutual Inductance
57(2)
4.5.3 Deleterious Effects of Mutual Inductance
59(1)
4.6 Hand Calculations for Inductance
60(4)
4.6.1 Inductance of a Wire Above a Return Plane
60(1)
4.6.2 Inductance of Side-by-Side Wires
61(1)
4.6.3 Inductance of Parallel Plates
61(2)
4.6.4 Inductance of Microstrip
63(1)
4.6.5 Inductance of Stripline
63(1)
4.7 Summary
64(1)
References
65(2)
CHAPTER 5 Transmission Lines 67(20)
5.1 Introduction
67(1)
5.2 General Circuit Model of a Lossy Transmission Line
67(4)
5.2.1 Relationship Between ωL and R
70(1)
5.2.2 Relationship Between ωC and G
70(1)
5.3 Impedance
71(2)
5.3.1 Calculating Impedance
72(1)
5.4 Traveling Waves
73(9)
5.4.1 Propagation Constant
74(1)
5.4.2 Phase Shift, Delay, and Wavelength
75(3)
5.4.3 Phase Constant at High Frequencies When R and G Are Small
78(1)
5.4.4 Attenuation
79(1)
5.4.5 Neper and Decibel Conversion
80(2)
5.5 Summary and Worked Examples
82(4)
References
86(1)
CHAPTER 6 Return Paths and Power Supply Decoupling 87(30)
6.1 Introduction
87(1)
6.2 Proper Return Paths
87(3)
6.2.1 Return Paths of Ground-Referenced Signals
89(1)
6.2.2 Stripline
90(1)
6.3 Stripline Routed Between Power and Ground Planes
90(5)
6.3.1 When Power Plane Voltage Is the Same as Signal Voltage
90(3)
6.3.2 When Power Plane Voltage Differs from Signal Voltage
93(1)
6.3.3 Power System Inductance
94(1)
6.4 Split Planes, Motes, and Layer Changes
95(3)
6.4.1 Motes
95(3)
6.4.2 Layer Changes
98(1)
6.5 Connectors and Dense Pin Fields
98(7)
6.5.1 Plane Perforation
99(1)
6.5.2 Antipads
99(3)
6.5.3 Nonfunctional Pads
102(1)
6.5.4 Guidelines for Routing Through Dense Pin Fields
103(2)
6.6 Power Supply Bypass/Decoupling Capacitance
105(7)
6.6.1 Power Supply Integrity
106(4)
6.6.2 Distributed Power Supply Interconnect Model
110(2)
6.7 Connecting to Decoupling Capacitors
112(2)
6.7.1 Via Inductance
112(2)
6.8 Summary
114(1)
References
115(2)
CHAPTER 7 Serial Communication, Loss, and Equalization 117(32)
7.1 Introduction
117(1)
7.2 Harmonic Contents of a Data Stream
117(8)
7.2.1 Line Spectra
119(1)
7.2.2 Combining Harmonics to Create a Pulse
120(2)
7.2.3 The Fourier Integral
122(1)
7.2.4 Rectangular Pulses with Nonzero Rise Times
123(2)
7.3 Line Codes
125(1)
7.4 Bit Rate and Data Rate
126(2)
7.5 Block Codes Used in Serial Transmission
128(2)
7.6 ISI
130(2)
7.6.1 Dispelsion
130(1)
7.6.2 Lone 1-Bit Pattern
131(1)
7.7 Eye Diagrams
132(2)
7.8 Equalization and Preemphasis
134(6)
7.8.1 Preemphasis
134(3)
7.8.2 Passive Equalizers
137(2)
7.8.3 Passive RC Equalizer
139(1)
7.9 DC-Blocking Capacitors
140(5)
7.9.1 Calculating the Coupling Capacitor Value
142(3)
7.10 Summary
145(1)
References
146(3)
CHAPTER 8 Single-Ended and Differential Signaling and Crosstalk 149(36)
8.1 Introduction
149(1)
8.2 Odd and Even Modes
149(9)
8.2.1 Circuit Description of Odd and Even Modes
150(3)
8.2.2 Coupling Coefficient
153(2)
8.2.3 Stripline and Microstrip Odd- and Even-Mode Timing
155(2)
8.2.4 Effects of Spacing on Impedance
157(1)
8.3 Multiconductor Transmission Lines
158(7)
8.3.1 Bus Segmentation for Simulation Purposes
159(1)
8.3.2 Switching Behavior of a Wide Bus
160(1)
8.3.3 Simulation Results for Loosely Coupled Lines
161(1)
8.3.4 Simulation Results for Tightly Coupled Lines
162(2)
8.3.5 Data-Dependent Timing Jitter in Multiconductor Transmission Lines
164(1)
8.4 Differential Signaling, Termination, and Layout Rules
165(8)
8.4.1 Differential Signals and Noise Rejection
165(1)
8.4.2 Differential Impedance and Termination
166(4)
8.4.3 Reflection Coefficient and Return Loss
170(2)
8.4.4 PWB Layout Rules When Routing Differential Pairs
172(1)
8.5 Crosstalk
173(9)
8.5.1 Coupled-Line Circuit Model
175(2)
8.5.2 NEXT and FEXT Coupling Factors
177(1)
8.5.3 Using K, to Predict NEXT
178(1)
8.5.4 Using Kf to Predict FEXT
179(1)
8.5.5 Guard Traces
179(1)
8.5.6 Crosstalk Worked Example
180(2)
8.5.7 Crosstalk Summary
182(1)
8.6 Summary
182(1)
References
183(2)
CHAPTER 9 Characteristics of Printed Wiring Stripline and Microstrips 185(24)
9.1 Introduction
185(1)
9.2 Stripline
185(8)
9.2.1 Trine of Flight
186(1)
9.2.2 Impedance Relationship Between Trace Width, Thickness, and Plate Spacing
187(2)
9.2.3 Mask Biasing to Obtain a Specific Impedance
189(1)
9.2.4 Hand Calculation of ZO
189(2)
9.2.5 Stripline Fabrication
191(2)
9.3 Microstrip
193(4)
9.3.1 Exposed Microstrip
194(2)
9.3.2 Solder Mask and Embedded Microstrip
196(1)
9.4 Losses in Stripline and Microstrip
197(4)
9.4.1 Dielectric Loss
199(1)
9.4.2 Conductor Loss
199(2)
9.5 Microstrip and Stripline Differential Pairs
201(5)
9.5.1 Broadside Coupled Stripline
201(3)
9.5.2 Edge-Coupled Stripline
204(1)
9.5.3 Edge-Coupled Microstrip
205(1)
9.6 Summary
206(1)
References
207(2)
CHAPTER 10 Surface Mount Capacitors 209(22)
10.1 Introduction
209(1)
10.2 Ceramic Surface Mount Capacitors
209(14)
10.2.1 Dielectric Temperature Characteristics Classification
209(2)
10.2.2 Body Size Coding
211(1)
10.2.3 Frequency Response
212(2)
10.2.4 Inductive Effects: ESL
214(1)
10.2.5 Dielectric and Conductor Losses: ESR
215(3)
10.2.6 Leakage Currents: Insulation Resistance
218(1)
10.2.7 Electrical Model
219(1)
10.2.8 MLCC Capacitor Aging
220(1)
10.2.9 Capacitance Change with DC Bias and Frequency
221(1)
10.2.10 MLCC Usage Guidelines
222(1)
10.3 SMT Tantalum Capacitors
223(5)
10.3.1 Body Size Coding
223(1)
10.3.2 Frequency Response
224(1)
10.3.3 Electrical Model
225(1)
10.3.4 Aging
225(1)
10.3.5 Effects of DC Bias, Temperature, and Relative Humidity
225(1)
10.3.6 Failure of Tantalum Capacitors
226(1)
10.3.7 ESR and Self Heating: Voltage and Temperature Derating
227(1)
10.3.8 Usage Guidelines
227(1)
10.4 Replacing Tantalum with High-Valued Ceramic Capacitors
228(2)
References
230(1)
Appendix: Conversion Factors 231(2)
About the Author 233(2)
Index 235