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El. knyga: Metrology and Diagnostic Techniques for Nanoelectronics

Edited by (National Institute of Standards and Technology, Hillsboro, OR, USA), Edited by (Intel Corporation, Hillsboro, OR, USA)
  • Formatas: 1454 pages
  • Išleidimo metai: 27-Mar-2017
  • Leidėjas: Pan Stanford Publishing Pte Ltd
  • ISBN-13: 9781351733946
Kitos knygos pagal šią temą:
Metrology and Diagnostic Techniques for NanoelectronicsDidesnis paveikslėlis
  • Formatas: 1454 pages
  • Išleidimo metai: 27-Mar-2017
  • Leidėjas: Pan Stanford Publishing Pte Ltd
  • ISBN-13: 9781351733946
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Nanoelectronics is changing the way how the world is communicated and is transforming our daily life. Continued Moore’s law scaling and miniaturization of low power semiconductor chips with ever increasing functionality in the past decade have been relentlessly driving research and development of new devices, materials, and process capabilities to meet performance, power and cost requirement. This book is designed to review the most recent work and results for selected important metrology and diagnostics topics being encountered in continuing Moore’s law scaling and product development. It is intended for a broad audience that is involved in all aspects of IC manufacturing and nanoelectronics from research to development to manufacturing. It can also serve as a reference book for those who study process and assembly technologies used in nanoelectronics or are involved in device testing, characterization, and diagnostic techniques.

The book is composed of twenty-five chapters divided into five parts covering characterization techniques and metrology for transistors, interconnects, defects, and emerging materials and devices, diagnostic methods and techniques for product debug and yield enhancement, and package fault isolation and defect imaging for 3D interconnects. The chapter authors are from academia, government labs, and industry, and have vast experiences and expertise in the topics presented.

Preface xxix
Introduction xxxi
Section 1 Characterization and Metrology for MOS Devices and Interconnects
1 Model-Based Scanning Electron Microscopy Critical-Dimension Metrology for 3D Nanostructures
3(28)
Andras E. Vladar
1.1 Introduction
4(1)
1.2 The Shortcomings of Traditional CD-SEM Metrology
5(2)
1.3 The Essential Requirements for SEM-Based Imaging of 3D Nanostructures
7(6)
1.3.1 The Spatial Resolution or Primary Electron Beam Focusing of the SEM
7(2)
1.3.2 The Noise of the SEM Image
9(1)
1.3.3 Control over the Landing Position of the Primary Electron Beam
10(3)
1.4 More Accurate and Faster SEM Dimensional Measurements
13(8)
1.4.1 Advanced Primary Electron Beam Scanning Methods
14(2)
1.4.2 Fast Imaging Combined with Motion Compensation
16(2)
1.4.3 Elimination of Electron Beam-Induced Contamination
18(3)
1.5 Three-Dimensional CD-SEM Metrology
21(11)
1.5.1 Three-Dimensional SEM Measurements of 10 nm IC Lines
21(2)
1.5.2 Three-Dimensional SEM Measurements of Complex Nanostructures
23(3)
1.5.3 Possibilities of 3D Measurements on Small Nanostructures
26(5)
2 X-Ray Metrology for Semiconductor Fabrication
31(34)
Daniel F. Sunday
R. Joseph Kline
2.1 Introduction
32(1)
2.2 X-Ray Properties
32(3)
2.3 Critical-Dimension Small-Angle X-Ray Scattering
35(12)
2.4 Directed Self-Assembly
47(5)
2.5 Considerations for Transition to Lab/Fab
52(6)
2.6 Grazing Incidence Small-Angle X-Ray Scattering
58(1)
2.7 Conclusions
59(6)
3 Advancements in Ellipsometric and Scatterometric Analysis
65(44)
Samuel O'Mullane
Dhairya Dixit
Alain C. Diebold
3.1 The Basics of Ellipsometry
65(14)
3.1.1 Optical Functions
67(4)
3.1.2 Ellipsometric Applications
71(5)
3.1.3 Jones and Stokes-Mueller Formalism
76(3)
3.2 An Introduction to Scatterometry
79(9)
3.2.1 Theory
81(1)
3.2.2 Applications of Scatterometry
82(6)
3.3 Advanced Applications
88(21)
3.3.1 Optically Anisotropic Materials
88(1)
3.3.2 Three-Dimensional Structures
89(4)
3.3.3 Metamaterials
93(16)
4 3D-AFM Measurements for Semiconductor Structures and Devices
109(44)
Ndubuisi G. Orji
Ronald G. Dixson
4.1 Introduction
109(11)
4.1.1 A Note on Dimensionality of Atomic Force Microscopes
111(1)
4.1.2 Implementations of 3D-AFM
112(2)
4.1.3 Semiconductor Dimensional Measurements
114(6)
4.2 Characterization and Calibration of a 3D Atomic Force Microscopes
120(15)
4.2.1 Scale Calibrations
120(3)
4.2.2 Calibration Sample Characterization
123(3)
4.2.3 Tip Width Calibration
126(2)
4.2.4 Angle Verification
128(4)
4.2.5 Uncertainty and Accuracy Considerations
132(3)
4.3 Applications of 3D Atomic Force Microscopes
135(9)
4.3.1 Reference Measurement System
136(2)
4.3.2 Contour Metrology
138(1)
4.3.3 Complementary and Hybrid Metrology
139(5)
4.4 Limitations of 3D Atomic Force Microscopes and Possible Solutions
144(1)
4.5 Conclusion and Outlook
145(8)
5 SIMS Analysis on the Transistor Scale: Probing Composition and Dopants in Nonplanar, Confined 3D Volumes
153(54)
Andre A. Budrevich
Wilfried Vandervorst
5.1 Introduction
154(3)
5.2 Basics of SIMS Depth Profiling of Planar Semiconductor Materials
157(4)
5.3 SIMS Analysis on the Transistor Scale
161(44)
5.3.1 1.5D SIMS Methodology
161(9)
5.3.2 Measurement of Dopants in Fins
170(10)
5.3.3 Compositional SIMS Microscopy on Embedded Layers
180(10)
5.3.4 Self-Focusing SIMS: Probing Composition and Dopants in Ultranarrow Trenches
190(1)
5.3.4.1 Localized area analysis
190(1)
5.3.4.2 Self-focusing SIMS
192(11)
5.3.5 Self-Limiting SIMS: Probing Composition and Dopants in Ultranarrow Trenches
203(2)
5.4 Conclusions
205(2)
6 Transistor Strain Measurement Techniques and Their Applications
207(170)
Markus Kuhn
Stephen Cea
Jiong Zhang
Matthew Wormington
Thomas Nuytten
Ingrid De Wolf
Jian-Min Zuo
Jean-Luc Rouviere
6.1 Characterization of Transistor Strain: An Industry Perspective
208(18)
6.1.1 Introduction
208(2)
6.1.2 Strain and CMOS Device Performance
210(2)
6.1.3 Stress, Strain, and Material Properties
212(1)
6.1.3.1 Stress/strain
213(1)
6.1.3.2 Balance of forces and sources of stress and strain
216(1)
6.1.3.3 Summary
219(1)
6.1.4 Thin-Film and Device-Level Stress/Strain Measurements
219(7)
6.2 X-Ray Diffraction of Epitaxial Thin Films and Patterned Nanostructures
226(49)
6.2.1 Introduction
226(1)
6.2.1.1 Principles of X-ray diffraction for strain/ stress determination
227(2)
6.2.2 High-Resolution X-Ray Diffraction
229(1)
6.2.2.1 Lattice mismatch, misfit, strain, and relaxation
231(1)
6.2.2.2 Elastic constants and lattice constant of cubic semiconductors
233(1)
6.2.2.3 Basic elastic theory for epitaxial thin films on a thick substrate
236(1)
6.2.3 Instrumentation
237(2)
6.2.4 Diffraction Geometries
239(1)
6.2.4.1 Angular separation between diffraction peaks
239(3)
6.2.5 HRXRD Measurements of Epitaxial Thin Films
242(1)
6.2.5.1 Fully strained structures
242(1)
6.2.5.2 Relaxed structures
246(2)
6.2.6 Reciprocal Space
248(1)
6.2.6.1 Scans and maps in reciprocal space
251(1)
6.2.7 Reciprocal Space Maps of Thin Films
252(6)
6.2.8 Reciprocal Space Maps of Patterned Nanostructures
258(1)
6.2.8.1 Periodicity and shape/ size analysis
258(1)
6.2.8.2 Strain/stress and composition analysis
262(7)
6.2.9 Synchrotron Studies
269(1)
6.2.9.1 Microbeam X-ray diffraction and topography
270(1)
6.2.9.2 Nanobeam reciprocal space mapping
272(1)
6.2.9.3 Bragg projection X-ray ptychography
273(1)
6.2.10 Conclusion and Outlook
274(1)
6.3 Strain Measurement Using Advanced Raman Spectroscopy
275(19)
6.3.1 Raman Spectroscopy: Theory and Early History
275(3)
6.3.2 Micro-Raman Spectroscopy
278(6)
6.3.3 Novel Approaches and State of the Art
284(1)
6.3.3.1 Resonant Raman enhancement
284(1)
6.3.3.2 Surface-enhanced Raman spectroscopy
285(1)
6.3.3.3 Tip-enhanced Raman spectroscopy
287(1)
6.3.3.4 Edge-enhanced Raman spectroscopy
290(3)
6.3.4 Summary
293(1)
6.4 Transistor Strain Measurement Using Electron Beam Techniques
294(84)
6.4.1 Introduction to Strain and Stress
296(1)
6.4.1.1 Strain and stress
296(1)
6.4.1.2 Definition of strain
297(1)
6.4.1.3 Theoretical modeling of strain and stress
299(1)
6.4.1.4 Measurement of strain and stress
300(1)
6.4.1.5 Strain and stress in nanoelectronic devices
300(2)
6.4.2 An Overview of Electron Beam-Based Strain Measurement Techniques
302(1)
6.4.2.1 Transmission electron microscopy
302(1)
6.4.2.2 Electron beam-based strain measurement techniques and capabilities
305(1)
6.4.2.3 TEM sample preparation
310(1)
6.4.2.4 The limitations of electron beam techniques
312(2)
6.4.3 Principles of Electron Diffraction-Based Strain Measurement Techniques and Applications
314(1)
6.4.3.1 Nanobeam electron diffraction
314(1)
6.4.3.2 Convergent beam electron diffraction
328(7)
6.4.4 Principles of Electron Imaging-Based Strain Measurement Techniques and Applications
335(1)
6.4.4.1 HREM
335(1)
6.4.4.2 Strain mapping using GPA
339(1)
6.4.4.3 STEM and its application for strain measurements
340(1)
6.4.4.4 Dark-field electron holography
348(4)
6.4.5 Conclusions
352(25)
7 Scanning Spreading Resistance Microscopy (SSRM): High-Resolution 2D and 3D Carrier Mapping of Semiconductor Nanostructures
377(70)
Andreas Schulze
Pierre Eyben
Thomas Hantschel
Wilfried Vandervorst
7.1 Introduction
378(1)
7.2 Fundamentals of SSRM
379(30)
7.2.1 Basic Principle
379(1)
7.2.2 Physics of the Spreading Resistance
380(1)
7.2.2.1 Maxwell's spreading resistance equation
380(1)
7.2.2.2 Sharvin's law
382(2)
7.2.3 SSRM on Silicon
384(1)
7.2.3.1 Electrical contact properties
386(1)
7.2.3.2 Surface states
387(1)
7.2.4 SSRM on Germanium
388(1)
7.2.4.1 Electrical contact properties
388(1)
7.2.4.2 Surface states
390(1)
7.2.4.3 Trap-assisted tunneling
391(1)
7.2.5 Quantification of SSRM Raw Data
392(1)
7.2.5.1 Homostructures
392(1)
7.2.5.2 Heterostructures
396(1)
7.2.6 SSRM Probes
397(8)
7.2.7 Environmental Aspects
405(1)
7.2.8 Sample Preparation
406(1)
7.2.8.1 Device cross-sectioning
406(1)
7.2.8.2 Electrical back-contact
407(1)
7.2.9 Three-Dimensional Carrier Mapping
408(1)
7.3 SSRM on Advanced 3D Semiconductor Devices
409(17)
7.3.1 SSRM on Nanowire-Based All-Silicon TFET
409(1)
7.3.1.1 Device configuration
409(1)
7.3.1.2 SSRM carrier maps
411(1)
7.3.1.3 Diameter-dependent boron diffusion
412(4)
7.3.2 SSRM on Nanowire-Based Heterojunction TFET
416(1)
7.3.2.1 Device configuration
416(1)
7.3.2.2 SSRM carrier maps
417(7)
7.3.3 SSRM on InP Fin Structure
424(2)
7.4 Fast Fourier Transform-SSRM
426(12)
7.4.1 FFT-SSRM: Principle of Operation
427(3)
7.4.2 Force Regime for FFT-SSRM
430(1)
7.4.3 Implementation of FFT-SSRM
431(1)
7.4.3.1 One-dimensional FFT-SSRM
431(1)
7.4.3.2 Two-dimensional FFT-SSRM
434(1)
7.4.4 FFT-SSRM in the Presence of Series Resistances
435(3)
7.5 Summary
438(9)
8 Microstructure Characterization of Nanoscale Materials and Interconnects
447(46)
J.K. Weiss
Jai Ganesh Kameswaran
Amith Darbal
Jiong Zhang
Di Xu
Edgar F. Rauch
8.1 Structure/Property Relationships of Interconnects
448(6)
8.1.1 Reliability
449(1)
8.1.1.1 Electromigration
449(1)
8.1.1.2 Stress-induced voiding
451(2)
8.1.2 Electrical Resistivity
453(1)
8.2 Microstructure Characterization Techniques for Interconnects
454(5)
8.2.1 Traditional Techniques to Characterize Microstructure
454(1)
8.2.1.1 Scanning electron microscopy and focused ion beam
454(1)
8.2.1.2 Electron backscattering diffraction
455(1)
8.2.1.3 TEM and STEM imaging
456(1)
8.2.2 Emerging Techniques for Nanostructure Characterization
457(1)
8.2.2.1 Three-dimensional EBSD development
457(1)
8.2.2.2 Automated crystal orientation mapping with NBD
458(1)
8.2.2.3 Transmission Kikuchi diffraction in SEM
458(1)
8.2.3 Concluding Remarks on Techniques
459(1)
8.3 Automated Crystal Orientation Mapping Using NBD
459(6)
8.3.1 Indexing Spot Diffraction Patterns through Template Matching
460(1)
8.3.2 Spatial and Angular Resolution and Limitations
461(4)
8.4 Precession Electron Diffraction
465(5)
8.5 Experimental Considerations
470(6)
8.5.1 Specimen Preparation
471(1)
8.5.2 Prespecimen Electron Optics
472(2)
8.5.3 Postspecimen Electron Optics
474(1)
8.5.4 Diffraction Pattern Recording
475(1)
8.6 Applications of ACOM with PED
476(17)
9 Characterization of the Chemistry and Mechanical Properties of Interconnect Materials and Interfaces: Impact on Interconnect Reliability
493(48)
Ying Zhou
Han Li
9.1 Introduction
494(1)
9.2 Surface and Interface Chemical Structure Characterization
495(13)
9.2.1 Surface Chemical Structure of Low-k Dielectrics and Process Impacts
497(5)
9.2.2 Cu Surface and Film Chemistry Analyses
502(2)
9.2.3 Characterization of Interfaces
504(4)
9.3 Progress in Characterizing the Adhesion, Fracture, and Mechanical Properties of Thin Films and Interconnect Structures
508(18)
9.3.1 Overview of Mechanical Characterization Techniques and Recent Advancements
508(3)
9.3.2 Buffer Layer Structures for Characterizing Mechanical Properties of Nanoporous Low-k Dielectrics
511(6)
9.3.3 Superlayer Structures for Adhesion and Fracture Measurement of Ultrathin-Film Stacks
517(4)
9.3.4 Controlled Fracture of Integrated Structures
521(4)
9.3.5 Future Challenges and Opportunities
525(1)
9.4 Integrated Studies of Surface and Interface Chemistry, Adhesion, and Electromigration Reliability
526(8)
9.4.1 Cu Barrier/ILD Interface
527(2)
9.4.2 Etch Stop/Cu Interface
529(5)
9.5 Concluding Remarks and Future Prospects
534(7)
10 Characterization of Plasma Damage for Low-k Dielectric Films
541(48)
Hualiang Shi
Huai Huang
Ryan S. Smith
Paul S. Ho
10.1 Introduction
542(2)
10.2 Molecular Bonding Characteristics of Low-k Dielectrics
544(4)
10.3 CO2 Plasma-Induced Damage to Porous Low-k Dielectrics
548(5)
10.3.1 Bonding Configuration Changes
549(1)
10.3.2 Depth of Carbon Depletion Layer
550(1)
10.3.3 Film Shrinkage and Densification
551(2)
10.3.4 Increase of the Effective Dielectric Constant
553(1)
10.4 Role of Plasma Species on Plasma Damage of Porous Low-k Dielectrics
553(13)
10.4.1 Effect of Radical Density
556(3)
10.4.2 Effect of Ion Energy
559(2)
10.4.3 Effect of Photon Energy and Intensity
561(4)
10.4.4 Effect of Low-k Pore Size and Porosity
565(1)
10.5 Kinetic Models for Plasma Damage Formation in Low-k Dielectrics
566(6)
10.5.1 Plasma-Altered Layer Model
567(3)
10.5.2 Sputtering Yield Model
570(2)
10.6 Dielectric Recovery of Plasma Damage
572(9)
10.6.1 Dielectric Recovery by Silylation
573(5)
10.6.2 Dielectric Recovery by UV Irradiation
578(3)
10.7 Conclusions
581(8)
11 Defect Characterization and Metrology
589(48)
Tuyen K. Tran
11.1 Introduction to Defect Characterization
589(3)
11.2 Unpatterned Defect Inspection: Past, Present, and Future
592(15)
11.3 Patterned Defect Inspection: Past, Present, and Future
607(19)
11.3.1 Dark-Field Inspection Technology
607(7)
11.3.2 Bright-Field Defect Inspection
614(7)
11.3.3 Electron Beam Defect Inspection
621(5)
11.4 Conclusion and Outlook
626(11)
12 3D Electron Tomography for Nanostructures
637(26)
Huolin L. Xin
Sai Bharadwaj Vishnubhotla
Ruoqian Lin
12.1 History
638(1)
12.2 Concepts of Tomography
639(5)
12.2.1 Radon Transformation
639(1)
12.2.2 Central Slice Theorem and Fourier Space Reconstruction
640(1)
12.2.3 Back Projection: Real Space Reconstruction
641(1)
12.2.3.1 Important parameters and aspects of electron tomography
642(2)
12.3 Types of Tomography
644(10)
12.3.1 HAADF (Z-Contrast) Tomography
644(2)
12.3.2 Incoherent Bright-Field STEM Tomography
646(3)
12.3.3 EFTEM Tomography
649(2)
12.3.4 STEM-EELS Tomography
651(1)
12.3.5 STEM-EDS Tomography
652(2)
12.4 Applications
654(5)
12.4.1 Electron Tomography for Characterizing Copper Interconnects
655(2)
12.4.2 Chemical 3D Tomography for High-k Dielectrics
657(1)
12.4.3 Imaging of Pore Structures of Low-k Dielectrics by 3D Tomography
658(1)
12.5 Conclusions
659(4)
13 Electron Energy Loss Spectroscopy of Semiconductor Nanostructures and Oxides
663(48)
Wu Zhou
Maria Varela
Juan-Carlos Idrobo
Sokrates T. Pantelides
Stephen J. Pennycook
13.1 Introduction
664(1)
13.2 General Principles of EELS
665(4)
13.3 Applications
669(27)
13.3.1 STEM-EELS with Atomic Column Sensitivity at the CoSi2/Si and SiO2/Si Interfaces
669(1)
13.3.2 STEM-EELS Analysis at the Single-Atom Level
670(14)
13.3.3 STEM-EELS Mapping on Complex-Oxide Thin Films
684(6)
13.3.4 Low-Loss EELS for Valence Excitations
690(6)
13.4 Perspectives
696(15)
14 Atom Probe Tomography of Semiconductor Nanostructures
711(48)
Thomas F. Kelly
Karen Henry
14.1 Introduction
711(1)
14.2 Overview of Atom Probe Tomography
712(11)
14.2.1 Essentials of How It Works
712(2)
14.2.2 Composition Determination
714(2)
14.2.3 Constructing the 3D Image
716(1)
14.2.4 Spatial Scaling
717(1)
14.2.5 FIB-Based Specimen Preparation
718(1)
14.2.6 Relevant Strengths and Limitations of APT for Metrology
718(3)
14.2.7 Compositional Fidelity
721(2)
14.2.8 Spatial Distortions
723(1)
14.3 Application of APT to Semiconductor Metrology
723(22)
14.3.1 Workflow for Typical Applications
725(2)
14.3.2 Critical Applications at Present
727(1)
14.3.2.1 Multilayer structures
727(1)
14.3.2.2 High-k applications
728(1)
14.3.2.3 Silicide applications
730(1)
14.3.2.4 MOSFET structures
732(1)
14.3.2.5 FinFET structures
734(1)
14.3.2.6 Fully processed devices
735(2)
14.3.3 Critical Applications in the Near Future
737(1)
14.3.3.1 Alternative channel materials: group IV
737(1)
14.3.3.2 Alternative channel materials: group III-V compounds
738(1)
14.3.3.3 New architectures: nanowires
740(5)
14.4 Roadmap for Metrology Improvement
745(2)
14.5 Conclusion
747(12)
Section 2 Characterization Techniques for Novel Materials and Devices beyond CMOS
15 Characterization and Metrology for Graphene Materials, Structures, and Devices
759(90)
Luigi Colombo
Alain Diebold
Cinzia Casiraghi
Moon Kim
Robert M. Wallace
Archana Venugopal
15.1 Introduction
760(7)
15.1.1 Graphene Preparation Processes
764(1)
15.1.2 Graphene Devices and Structures
765(2)
15.2 Physical Characterization
767(45)
15.2.1 Optical Microscopy
769(2)
15.2.2 Scanning Electron Microscopy
771(1)
15.2.3 Scanning Tunneling Microscopy
771(2)
15.2.4 Raman Spectroscopy
773(12)
15.2.5 X-Ray Photoelectron Spectroscopy
785(8)
15.2.6 Low-Energy Electron and Ion Techniques
793(1)
15.2.6.1 Low-energy electron diffraction
793(1)
15.2.6.2 Low-energy electron microscopy
793(1)
15.2.6.3 Low-energy ion spectroscopy
794(1)
15.2.7 X-Ray Diffraction
794(1)
15.2.8 Transmission Electron Microscopy
795(1)
15.2.8.1 TEM sample preparation
795(1)
15.2.8.2 TEM techniques
798(1)
15.2.8.3 Grain morphology and growth behavior
798(1)
15.2.8.4 Layers and stacking
803(1)
15.2.8.5 High-resolution TEM imaging
805(1)
15.2.8.6 Atomic-resolution spectroscopy
807(1)
15.2.8.7 In situ study
808(1)
15.2.8.8 Graphene as a template substrate for 2D TMD growth
810(2)
15.3 Optical Characterization
812(3)
15.3.1 THz Optical Properties
812(1)
15.3.2 Infrared Optical Properties of Graphene
812(1)
15.3.3 Near-Infrared, Visible, and UV Optical Properties of Graphene
813(1)
15.3.4 Dielectric Function in Deep VUV
814(1)
15.4 Electrical Characterization
815(7)
15.4.1 Kelvin Probe Method
815(1)
15.4.2 R-Vgs Characteristics
815(2)
15.4.3 Contact Resistance
817(1)
15.4.3.1 Transfer length method
818(1)
15.4.4 Mobility
819(3)
15.4.5 Spin-Based Transport
822(1)
15.5 Summary
822(27)
16 Characterization of Magnetic Nanostructures for Spin-Torque Memory Applications with Macro- and Microscale Ferromagnetic Resonance
849(42)
T.J. Silva
H.T. Nembach
J M. Shaw
Brian Doyle
Kaan Oguz
Kevin O'Brien
Mark Doczy
16.1 Background: Spin-Torque RAM and Ferromagnetic Resonance
850(4)
16.1.1 Figures of Merit for Write Efficiency: Anisotropy and Damping
850(1)
16.1.2 Magnetization Dynamics and Ferromagnetic Resonance
851(3)
16.2 Measurement Methods: VNA-FMR
854(15)
16.2.1 Basics of the Measurement Procedure
854(1)
16.2.2 VNA-FMR Measurement Physics
855(3)
16.2.3 Excitation Field Details
858(3)
16.2.4 CPW Design Considerations
861(2)
16.2.5 Sample-CPW Interactions: Eddy Currents and Capacitive Shunting
863(2)
16.2.6 Extraction of the Damping Parameter a: The Case of CoFeB/MgO Sandwich Structures
865(2)
16.2.7 Limits for the Use of Damping Measurements with Blanket Films
867(2)
16.3 Measurement Methods: H-MOMM
869(23)
16.3.1 Basics of Heterodyne Magneto-Optic Microwave Magnetometry
869(2)
16.3.2 Signal-to-Noise Ratio for H-MOMM
871(6)
16.3.3 Details of Signal Detection
877(2)
16.3.4 Spectra and Damping for Individual, In-Plane-Oriented Permalloy Nanomagnets, and Evidence for Curvature-Dependent, Nonlocal Damping
879(3)
16.3.5 Considerations for Use of H-MOMM in a Perpendicular Geometry
882(9)
17 Band Alignment Measurement by Internal Photoemission Spectroscopy
891(42)
Nhan V. Nguyen
17.1 Introduction
892(3)
17.2 Basic Principle of Internal Photoemission
895(8)
17.2.1 Internal Photoemission Process
895(1)
17.2.1.1 Optical excitation
896(1)
17.2.1.2 Transport to the interface
899(1)
17.2.1.3 Escape over the barrier
900(1)
17.2.2 Barrier Height Lowering
901(2)
17.3 IPE Measurements and Hole Emission
903(4)
17.3.1 Measurements
903(1)
17.3.2 Hole Emission Detection
904(3)
17.4 Application as Threshold Spectroscopy
907(19)
17.4.1 Metal/SiO2/Si
908(1)
17.4.2 Semiconductor Heterojunctions
909(1)
17.4.2.1 InAs/AlGaSb heterojunction
910(1)
17.4.2.2 InAs/GaSb
914(5)
17.4.3 Direct Measurement of the Intrinsic Work Function and Band Alignment of Graphene
919(7)
17.5 Summary
926(7)
Section 3 Electrical Characterization and Reliability Testing Techniques
18 Electrical Characterization of Nanoscale Transistors: Emphasis on Traps Associated with MOS Gate Stacks
933(44)
Xiao Sun
T.P. Ma
18.1 Introduction
934(1)
18.2 Traps in MOS Devices: Origins and Impacts
934(7)
18.2.1 Interface Traps
935(3)
18.2.2 Border and Oxide Traps
938(3)
18.3 Electrical Characterization Methods for Traps in MOS Devices
941(37)
18.3.1 Based on DC Id-Vg Measurements
941(2)
18.3.2 Gate Admittance Methods
943(3)
18.3.3 Gate Admittance as Affected by Border Traps
946(1)
18.3.4 Charge Pumping Method
947(3)
18.3.5 Limitations of Gate Admittance and Charge Pumping Methods
950(1)
18.3.6 Noise Measurements
951(3)
18.3.7 AC Transconductance Method
954(1)
18.3.7.1 AC transconductance method for characterizing interface traps
954(1)
18.3.7.2 AC transconductance method for characterizing slow traps
955(7)
18.3.8 Pulsed I-V and Time-Dependent Defect Spectroscopy
962(2)
18.3.9 Inelastic Electron Tunneling Spectroscopy
964(13)
19 Charge Pumping for Reliability Characterization and Testing of Nanoelectronic Devices
977(36)
Jason T. Ryan
Jason P. Campbell
Kin P. Cheung
John S. Suehle
19.1 Introduction
978(1)
19.2 The Basic Charge-Pumping Method
978(2)
19.3 Measurement Considerations: Transition Times
980(2)
19.4 Measurement Considerations: Incomplete Trap Filling
982(2)
19.5 Measurement Considerations: Gate Leakage Current and Mitigation Methods
984(7)
19.6 Interface Defect Spectroscopy Using the Charge-Pumping Technique
991(6)
19.7 Bulk Trap Depth Profiling via Frequency-Dependent Charge Pumping
997(8)
19.8 Summary
1005(8)
20 Application of in situ Resistance and Nanocalorimetry Measurements for Nanoelectronic Thin-Film Materials
1013(76)
Zichao Ye
Zhiyong Ma
Leslie H. Allen
20.1 In situ Resistance Measurements
1015(35)
20.1.1 Introduction
1015(2)
20.1.2 Experimental/Instrumentation Methods
1017(1)
20.1.2.1 Probe arrangement (4-point vs. 2-point)
1017(1)
20.1.2.2 Blanket samples vs. patterned samples
1018(1)
20.1.2.3 Contact probes
1019(1)
20.1.2.4 Experimental apparatus
1020(1)
20.1.2.5 Temperature gradient
1020(1)
20.1.3 Johnson Noise
1021(2)
20.1.4 1/f Noise
1023(2)
20.1.5 Electromigration
1025(3)
20.1.6 TCR Calibration: Reversible Measurements
1028(3)
20.1.7 Shunting Effect during in situ Resistance Measurements
1031(1)
20.1.8 Self-Heating
1032(1)
20.1.9 The Effect of Temperature-Induced Stress on Resistance
1033(2)
20.1.10 Applications of in situ Resistance Measurements
1035(1)
20.1.10.1 Eutectic metal silicides
1035(1)
20.1.10.2 Titanium silicide
1037(1)
20.1.10.3 Cobalt silicide
1041(1)
20.1.10.4 Nickel silicide
1043(1)
20.1.10.5 In situ resistance measurement during sputtering and ALD
1046(4)
20.2 Nanocalorimetry Measurements for Nanoelectronic Thin-Film Materials
1050(25)
20.2.1 Introduction
1050(2)
20.2.2 Principles
1052(1)
20.2.2.1 Nanocalorimetry sensor (DC nanocalorimetry)
1052(1)
20.2.2.2 Operation principles (DC nanocalorimetry)
1055(1)
20.2.2.3 AC nanocalorimetry
1058(1)
20.2.3 Applications in Nanoelectronics
1058(1)
20.2.3.1 Nanocalorimetry used in ion implantation
1058(1)
20.2.3.2 Nanoelectronic materials
1060(1)
20.2.3.3 Size effect melting of nanostructures
1071(1)
20.2.3.4 Nanocalorimetry coupled with TEM
1073(2)
20.3 Conclusions
1075(14)
Section 4 Characterization and Metrology for 3D Stacked Die/Package Interconnections
21 Methodology and Challenges in Characterization of 3D Package Interconnection Materials and Processes
1089(32)
Rajen Dias
Deepak Goyal
21.1 Introduction
1090(1)
21.2 Types of 3D Package Interconnections
1090(7)
21.2.1 Stacked-Die Package Technology
1091(1)
21.2.2 Flip-Chip Package Technology
1092(2)
21.2.3 Package-on-Package Technology
1094(1)
21.2.4 Through-Silicon Via Technology
1095(2)
21.3 Failure Modes and Mechanisms Seen in 3D Stacked Package Technologies
1097(11)
21.3.1 Failure Mode Categories
1099(1)
21.3.1.1 Mold compound-related failures
1099(1)
21.3.1.2 First-level interconnect-related failures
1101(1)
21.3.1.3 Substrate failure mechanisms
1105(1)
21.3.1.4 Silicon die failure mechanisms
1105(1)
21.3.2 Die Cracking
1105(1)
21.3.2.1 Through-mold interconnect
1107(1)
21.3.2.2 Through-silicon via
1107(1)
21.4 Failure Analysis Challenges for 3D Interconnect Fault Isolation and Defect/Damage Detection
1108(14)
21.4.1 Fault Isolation Challenges
1110(1)
21.4.2 Nondestructive Defect Imaging Challenges
1111(1)
21.4.3 Sample Preparation Challenges
1112(9)
22 3D Interconnect Characterization Using Raman Spectroscopy
1121(26)
Ingrid De Wolf
22.1 Introduction
1122(1)
22.2 Wafer Thinning
1123(3)
22.3 Through-Silicon Vias
1126(11)
22.4 Microbumps and Stacks
1137(3)
22.5 Conclusions
1140(7)
23 Advances in 3D Interconnect Characterization Techniques for Fault Isolation and Defect Imaging
1147(128)
Wenbing Yun
Mario Pacheco
Sebastian Brand
Peter Czurratis
Matthias Petzold
Tatjana Djuric
Peter Hoffrogge
Mayue Xie
Deepak Goyal
Zhiyong Wang
Antonio Orozco
Fred C. Wellstood
Rajen Dias
23.1 3D X-Ray Computed Tomography
1148(16)
23.1.1 Introduction
1148(1)
23.1.1.1 Challenges in 3D imaging of IC packages
1148(1)
23.1.1.2 X-ray CT for IC package imaging applications
1149(1)
23.1.2 High-Resolution X-Ray CT Systems and Operating Principle
1149(1)
23.1.2.1 Point projection-based X-ray CT system
1149(1)
23.1.2.2 Lens-based X-ray CT system
1150(1)
23.1.2.3 Principle of CT image acquisition and reconstruction
1151(2)
23.1.3 Applications
1153(1)
23.1.3.1 Wire bond defects in multistacked packages
1153(1)
23.1.3.2 Electronic open defects in 3D packages
1155(1)
23.1.3.3 Electronic shorting defects in 3D packages
1158(1)
23.1.3.4 Imaging voids in through-silicon vias
1159(2)
23.1.4 Discussion and Outlook
1161(3)
23.2 Scanning Acoustic Microscopy in Modern Failure Analysis
1164(42)
23.2.1 Introduction: State of the Art in Scanning Acoustic Microscopy and Upcoming Challenges
1164(2)
23.2.2 Theoretical Description and Elementary Acoustics
1166(1)
23.2.2.1 Acoustic wave propagation
1166(1)
23.2.2.2 Contrast formation in acoustical imaging
1167(1)
23.2.2.3 The acoustic lens and the challenge of focusing
1170(1)
23.2.2.4 The basic concept of an acoustic microscope
1176(1)
23.2.3 Conventional Scanning Acoustic Microscopy
1177(2)
23.2.4 Signal Analysis and Parametric Imaging
1179(1)
23.2.4.1 Hilbert transformation and energy-related parameters
1179(1)
23.2.4.2 Automated bump inspection of flip-chip interconnects
1181(1)
23.2.4.3 Spectral domain imaging and SSP
1188(1)
23.2.4.4 3D and volumetric imaging
1192(1)
23.2.5 Acoustic GHz-Microscopy
1192(1)
23.2.5.1 Acoustic GHz-microscopy: general scope, properties, and equipment
1194(1)
23.2.5.2 Upcoming applications of GHz-SAM in failure analysis workflows
1196(10)
23.3 Electro-Optic Terahertz Pulse Reflectometry and Lock-In Thermography
1206(22)
23.3.1 Introduction
1206(1)
23.3.2 Electro-Optic Terahertz Pulse Reflectometry
1207(1)
23.3.2.1 EOTPR with improved accuracy and sensitivity
1211(1)
23.3.2.2 EOTPR for feature-based 3D package fault isolation
1214(4)
23.3.3 Introduction of Lock-In Thermography
1218(1)
23.3.3.1 Challenges of LIT and its applications to 3D packages
1219(1)
23.3.3.2 Defect depth localization estimate for 3D packages
1223(5)
23.4 Magnetic Field Imaging
1228(48)
23.4.1 Introduction
1228(1)
23.4.2 Magnetic Field Imaging
1229(1)
23.4.2.1 Fundamentals
1230(1)
23.4.2.2 Magnetic sensors
1232(1)
23.4.2.3 Sensitivity requirements
1239(1)
23.4.2.4 Resolution and sensor geometry
1242(4)
23.4.3 Current Mapping: Standard Inverse Technique
1246(3)
23.4.4 3D Interconnects and Stacked Devices: The 3D Problem
1249(1)
24.4.4.1 Limitations of the standard inversion technique
1249(1)
23.4.4.2 Magnetic field 3D solver
1251(1)
23.4.4.3 Application examples
1253(11)
23.4.5 Conclusions
1264(11)
Section 5 Circuit Diagnostic and Probing Techniques
24 Optical and Electrical Nanoprobing for Circuit Diagnostics
1275(72)
Travis Eiles
Tom Tong
Edward I. Cole Jr
24.1 Introduction
1276(2)
24.1.1 Root Cause Analysis
1277(1)
24.2 Optical Properties of Si and Si-Based Devices
1278(10)
24.2.1 Optical Absorption and Refractive Index
1278(2)
24.2.2 Photon Emission from MOSFETs
1280(1)
24.2.2.1 Voltage dependence of MOSFET photon emission
1282(1)
24.2.2.2 Device-type dependence
1283(1)
24.2.2.3 Energy spectrum of photon emission
1283(1)
24.2.2.4 Time dependence of photon emission
1284(1)
24.2.3 Electro-Optic Effects in Si
1285(1)
24.2.3.1 Bias and device-type dependence of transistor electro-optic effects
1286(1)
24.2.3.2 Time dependence of transistor electro-optic effects
1287(1)
24.2.4 Other Physical Properties of Silicon
1287(1)
24.2.5 Summary on Optical Properties
1288(1)
24.3 Optical Diagnostics Methods
1288(24)
24.3.1 Emission Microscopy and Time-Resolved Emission
1289(1)
24.3.1.1 Static emission microscopy
1291(1)
24.3.1.2 Time-resolved emission
1295(1)
24.3.1.3 Outlook on emission microscopy
1297(1)
24.3.2 Laser Stimulation Methods: Photon Probing
1297(1)
24.3.2.1 Introduction
1297(1)
24.3.2.2 Active photon probing
1298(1)
24.3.2.3 Optical beam-induced current
1298(1)
24.3.2.4 Light-induced voltage alteration
1300(1)
24.3.2.5 IC analysis using localized laser heating
1303(1)
24.3.2.6 OBIRCH and TIVA imaging
1304(1)
24.3.2.7 Seebeck effect imaging
1306(1)
24.3.2.8 Soft defect localization and laser-assisted device alteration
1307(1)
24.3.2.9 Laser voltage probing
1309(3)
24.4 Microscopy Resolution
1312(5)
24.4.1 Background
1312(1)
24.4.2 Solid Immersion Lenses
1313(3)
24.4.3 Other Directions in Optical Microscopy
1316(1)
24.5 Electrical Nanoprobing Techniques
1317(22)
24.5.1 Background
1317(1)
24.5.2 AFP and C-AFM Probing
1318(2)
24.5.3 SEM/FIB-Based Nanoprobing Techniques
1320(5)
24.5.4 Transistor Characterizations
1325(5)
24.5.5 Metal Interconnect Probing
1330(6)
24.5.6 Circuit-Level Probing and Special Nanoprobing Techniques
1336(3)
24.6 Conclusions
1339(8)
25 Automated Tools and Methods for Debug and Diagnosis
1347(36)
Srikanth Venkataraman
25.1 Introduction
1348(6)
25.1.1 What Are Debug and Diagnosis?
1348(1)
25.1.2 Where Is Diagnosis Used?
1349(1)
25.1.3 IC-Level Debug and Diagnosis
1350(1)
25.1.4 Silicon Debug versus Defect Diagnosis
1350(3)
25.1.5 Design for Debug and Diagnosis
1353(1)
25.2 Logic Design for Debug and Diagnosis Structures
1354(11)
25.2.1 Scan
1354(1)
25.2.2 Observation-Only Scan
1355(3)
25.2.3 Observation Points with Multiplexers
1358(1)
25.2.4 Array Dump and Trace Logic Analyzer
1358(2)
25.2.5 Clock Control
1360(3)
25.2.6 Partitioning, Isolation, and De-featuring
1363(1)
25.2.7 Reconfigurable Logic
1364(1)
25.2.8 Spare Gates and Spare Wires
1364(1)
25.3 Diagnosis and Debug Process
1365(7)
25.3.1 Diagnosis Techniques and Strategies
1368(2)
25.3.2 Silicon Debug Process and Flow
1370(1)
25.3.3 Debug Techniques and Methodology
1371(1)
25.4 Automated Diagnosis Using Scan
1372(6)
25.4.1 Introduction
1373(1)
25.4.2 How Diagnosis Works
1374(1)
25.4.3 A Typical Diagnosis Flow
1375(1)
25.4.4 Making Diagnosis Work in a Full Work Flow
1376(2)
25.5 Summary and Future Challenges
1378(5)
Index 1383
Zhiyong Ma received his MS degree in materials engineering from Purdue University, Indiana, and a PhD in materials science and engineering from the University of Illinois, Urbana-Champaign. He worked in thin-film metallization and processing at Digital Equipment Corporation and joined Intels Corporate Quality Network in 1995. Currently, he is vice president of the Technology and Manufacturing Group and director of Technology Development and Manufacturing Labs at Intel, responsible for the CQN lab network in support of silicon and assembly technology development and manufacturing, product fault diagnostics, and silicon and platform benchmarking, including strategic business planning, analytical technique development, and metrology roadmaps. Dr. Ma holds 8 patents in underbump metallization, strained silicon transistors, secured fuse technology, and silicon diagnostic techniques, has published more than 25 refereed papers, and has coauthored a book chapter on silicide technology. His research interests include thin-film kinetics, analytical techniques and metrology, and product fault diagnostics.

David G. Seiler received his PhD and MS in physics from Purdue University and a BS in physics from Case Western Reserve University, Ohio. He is a fellow of the American Physical Society and a fellow of the Institute of Electrical and Electronic Engineers. In 2000, he received a Distinguished Alumni Award from Purdue University's School of Science for his contributions to and achievements in semiconductors. He served as solid state physics program director in the Materials Research Division, National Science Foundation; spent a years sabbatical at the MIT Francis Bitter National Magnet Laboratory; and was a regents professor of physics at the University of North Texas. He joined the National Institute of Standards and Technology (NIST) in 1988 and served as program analyst in the program office for the director of NIST and as materials technology group leader in the Engineering Physics Division. Currently, he is chief of the division, which provides technical leadership in measurement science research, development, and standards essential to improving US economic competitiveness for advanced manufacturing. Dr. Seiler has been the chairperson and proceedings editor of 15 international conferences or workshops. He is the coeditor and coauthor of a chapter in Semiconductors and Semimetals (1992, Vol. 36) and a coauthor of a chapter in Handbook of Optics (1995, revised 2009). His current research focus is on understanding and advancing the metrology and characterization measurements needed for the future of nanoelectronics. The results of his research have been disseminated in over 200 publications and 100 talks throughout the world.
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