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Multiprocessor System-on-Chip: Hardware Design and Tool Integration 2011 ed. [Minkštas viršelis]

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  • Formatas: Paperback / softback, 270 pages, aukštis x plotis: 235x155 mm, weight: 454 g, VIII, 270 p., 1 Paperback / softback
  • Išleidimo metai: 20-Sep-2014
  • Leidėjas: Springer-Verlag New York Inc.
  • ISBN-10: 1489982469
  • ISBN-13: 9781489982469
Kitos knygos pagal šią temą:
Multiprocessor System-on-Chip: Hardware Design and Tool Integration 2011 ed.Didesnis paveikslėlis
  • Formatas: Paperback / softback, 270 pages, aukštis x plotis: 235x155 mm, weight: 454 g, VIII, 270 p., 1 Paperback / softback
  • Išleidimo metai: 20-Sep-2014
  • Leidėjas: Springer-Verlag New York Inc.
  • ISBN-10: 1489982469
  • ISBN-13: 9781489982469
Kitos knygos pagal šią temą:
Pastovi nuoroda: https://www.kriso.lt/db/9781489982469.html
Raktažodžiai:

This book evaluates strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. It examines both hardware design and integration of new development tools as well as novel trends in MPSoC design.



The purpose of this book is to evaluate strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools will be discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design.
Part 1: Application Mapping and Communication Infrastructure: Virtualization in NOCs--Enhanced MPSOC Robustness and Performance Verification.-HW Support to Exploit Parallelism in Homogeneous and Heterogeneous Multicore System-on-Chip.-PALLAS: Mapping Applications onto Manycore.-Part 2: Reconfigurable Hardware in Multiprocessor Systems: Adaptive Multiprocessor System on Chip Architecture.-Designing FPGA Systems with Many Processors.-Part 3: Physical Design of Multiprocessor Systems: Design tools and methods for chip physical design.-Challenges in Physical Design for Multi- and Manycore Hardware Architectures.