Atnaujinkite slapukų nuostatas

El. knyga: Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems

, , ,
Kitos knygos pagal šią temą:
Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier SystemsDidesnis paveikslėlis
Kitos knygos pagal šią temą:

DRM apribojimai

  • Kopijuoti:

    neleidžiama

  • Spausdinti:

    neleidžiama

  • El. knygos naudojimas:

    Skaitmeninių teisių valdymas (DRM)
    Leidykla pateikė šią knygą šifruota forma, o tai reiškia, kad norint ją atrakinti ir perskaityti reikia įdiegti nemokamą programinę įrangą. Norint skaityti šią el. knygą, turite susikurti Adobe ID . Daugiau informacijos  čia. El. knygą galima atsisiųsti į 6 įrenginius (vienas vartotojas su tuo pačiu Adobe ID).

    Reikalinga programinė įranga
    Norint skaityti šią el. knygą mobiliajame įrenginyje (telefone ar planšetiniame kompiuteryje), turite įdiegti šią nemokamą programėlę: PocketBook Reader (iOS / Android)

    Norint skaityti šią el. knygą asmeniniame arba „Mac“ kompiuteryje, Jums reikalinga  Adobe Digital Editions “ (tai nemokama programa, specialiai sukurta el. knygoms. Tai nėra tas pats, kas „Adobe Reader“, kurią tikriausiai jau turite savo kompiuteryje.)

    Negalite skaityti šios el. knygos naudodami „Amazon Kindle“.

This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase, or adaptation during operation, to enhance data converters performance, flexibility, robustness, and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.

1 Introduction
1(4)
1.1 Background
1(1)
1.2 Book Aim and Outline
2(3)
References
3(2)
2 Enhancing ADC Performance by Exploiting Signal Properties
5(18)
2.1 Introduction to Analog-to-Digital Converters
5(2)
2.2 ADC Performance Parameters
7(4)
2.2.1 Conversion Accuracy
7(3)
2.2.2 Bandwidth
10(1)
2.2.3 Power
10(1)
2.2.4 ADC Figure-of-Merit
11(1)
2.3 ADC Performance Limitations and Trends
11(3)
2.4 ADC Architectures
14(3)
2.5 Exploiting Signal Properties
17(3)
2.6 Conclusion
20(3)
References
20(3)
3 Parallel-Sampling ADC Architecture for Multi-carrier Signals
23(28)
3.1 Introduction to Multi-carrier Transmission
23(2)
3.2 Statistical Amplitude Properties of Multi-carrier Signals
25(3)
3.3 ADC Requirements for Multi-carrier Signals
28(5)
3.4 Power Reduction Techniques for Thermal-Noise Limited ADCs
33(3)
3.5 A Parallel-Sampling ADC Architecture
36(9)
3.5.1 Principle of the Parallel-Sampling ADC Architecture
37(2)
3.5.2 Advantages of the Parallel-Sampling Architecture
39(4)
3.5.3 Impact of Mismatch Between Signal Paths
43(2)
3.6 Implementation Options
45(2)
3.7 Conclusions
47(4)
References
48(3)
4 Implementations of the Parallel-Sampling ADC Architecture
51(52)
4.1 Parallel-Sampling Architecture Applied to a Pipeline ADC
52(12)
4.1.1 Pipeline ADCs Architecture
52(1)
4.1.2 A Parallel-Sampling First Stage for a Pipeline ADC
53(3)
4.1.3 Implementation and Operation of the First Stage
56(4)
4.1.4 Simulation and Comparison
60(4)
4.2 Parallel-Sampling Architecture Applied to a TI SAR ADC
64(9)
4.2.1 A Hierarchical TI-SAR ADC Architecture
64(1)
4.2.2 A Parallel-Sampling Frontend Stage for a TI-SAR ADC
65(2)
4.2.3 Implementation and Operation
67(3)
4.2.4 Simulation Results
70(3)
4.3 Design of a 1 GS/s 11-b Parallel-Sampling ADC for Broadband Multi-Carrier Systems
73(26)
4.3.1 Architecture and Operation Overview
74(1)
4.3.2 Circuit Implementation
74(9)
4.3.3 Layout and Test-Chip Implementation
83(1)
4.3.4 Measurement Setup
84(3)
4.3.5 Experimental Results
87(7)
4.3.6 Performance Summary
94(1)
4.3.7 Comparison with State-of-the-Art
95(4)
4.4 Conclusions
99(4)
References
99(4)
5 Conclusions and Recommendations
103(4)
5.1 Conclusions
103(1)
5.2 Recommendations for Future Research
104(3)
References
105(2)
Appendix: A Dynamic Latched Comparator for Low Supply Voltage Applications 107
Daugiau apie elektronines knygas Daugiau apie elektronines knygas
Pastovi nuoroda: https://www.kriso.lt/db/97833191768022e.html
Raktažodžiai: