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El. knyga: System Specification and Design Languages: Selected Contributions from FDL 2010

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This book brings together a selection of the best papers from the thirteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in Southampton, UK in September 2010.  FDL is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
1 Formal Hardware/Software Co-verification of Application Specific Instruction Set Processors
1(20)
Sacha Loitz
Markus Wedler
Dominik Stoffel
Christian Brehm
Wolfgang Kunz
Norbert Wehn
2 Evaluating Debugging Algorithms from a Qualitative Perspective
21(16)
Alexander Finder
Gorschwin Fey
3 Mapping of Concurrent Object-Oriented Models to Extended Real-Time Task Networks
37(18)
Matthias Buker
Kim Gruttner
Philipp A. Hartmann
Ingo Stierand
4 SystemC-A Modelling of Mixed-Technology Systems with Distributed Behaviour
55(16)
Chenxu Zhao
Tom J. Kazmierski
5 A Framework for Interactive Refinement of Mixed HW/SW/Analog Systems
71(20)
Tobias Kirchner
Nico Bannow
Christian Kerstan
Christoph Grimm
6 Bottom-up Verification for CMOS Photonic Linear Heterogeneous System
91(14)
Bo Wang
Ian O'Connor
Emmanuel Drouard
Lioua Labrak
7 Towards Abstract Analysis Techniques for Range Based System Simulations
105(18)
Florian Schupfer
Michael Kargel
Christoph Grimm
Markus Olbrich
Erich Barke
8 Modeling Time-Triggered Architecture Based Real-Time Systems Using SystemC
123(20)
Jon Perez
Carlos Fernando Nicolas
Roman Obermaisser
Christian El Salloum
9 Towards the Development of a Set of Transaction Level Models A Feature-Oriented Approach
143(14)
Ye Jun
Tan Qingping
Li Tun
10 Rapid Prototyping of Complex HW/SW Systems using a Timing and Power Aware ESL Framework
157(18)
Kim Gruttner
Kai Hylla
Sven Rosinger
Wolfgang Nebel
11 Towards Accurate Source-Level Annotation of Low-Level Properties Obtained from Optimized Binary Code
175(16)
Stefan Stattelmann
Alexander Viehl
Oliver Bringmann
Wolfgang Rosenstiel
12 Architecture Specifications in CλaSH
191(16)
Jan Kuper
Christiaan Baaij
Matthijs Kooijman
Marco Gerards
13 SyReC: A Programming Language for Synthesis of Reversible Circuits
207(16)
Robert Wille
Sebastian Offermann
Rolf Drechsler
14 Logical Time @ Work: Capturing Data Dependencies and Platform Constraints
223(16)
Calin Glitia
Julien DeAntoni
Frederic Mallet
15 Formal Support for Untimed MARTE-SystemC Interoperability
239
Pablo Penil
Fernando Herrera
Eugenio Villar
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