Atnaujinkite slapukų nuostatas

SystemC and SystemC-AMS in Practice: SystemC 2.3, 2.2 and SystemC-AMS 1.0 2014 ed. [Kietas viršelis]

,
  • Formatas: Hardback, 460 pages, aukštis x plotis: 235x155 mm, weight: 8276 g, 31 Illustrations, color; 193 Illustrations, black and white; IX, 460 p. 224 illus., 31 illus. in color., 1 Hardback
  • Išleidimo metai: 24-Sep-2013
  • Leidėjas: Springer International Publishing AG
  • ISBN-10: 3319011464
  • ISBN-13: 9783319011462
Kitos knygos pagal šią temą:
SystemC and SystemC-AMS in Practice: SystemC 2.3, 2.2 and SystemC-AMS 1.0 2014 ed.Didesnis paveikslėlis
  • Formatas: Hardback, 460 pages, aukštis x plotis: 235x155 mm, weight: 8276 g, 31 Illustrations, color; 193 Illustrations, black and white; IX, 460 p. 224 illus., 31 illus. in color., 1 Hardback
  • Išleidimo metai: 24-Sep-2013
  • Leidėjas: Springer International Publishing AG
  • ISBN-10: 3319011464
  • ISBN-13: 9783319011462
Kitos knygos pagal šią temą:
Pastovi nuoroda: https://www.kriso.lt/db/9783319011462.html
Raktažodžiai:
This book describes how engineers can make optimum use of the two industry standard analysis/design tools, SystemC and SystemC-AMS.  The authors use a system-level design approach, emphasizing how SystemC and SystemC-AMS features can be exploited most effectively to analyze/understand a given electronic system and explore the design space. The approach taken by this book enables system engineers to concentrate on only those SystemC/SystemC-AMS features that apply to their particular problem, leading to more efficient design. The presentation includes numerous, realistic and complete examples, which are graded in levels of difficulty to illustrate how a variety of systems can be analyzed with these tools.
1 Introduction to SystemC 1(2)
1.1 Introduction
1(1)
Reference
2(1)
2 Downloading, Configuring, Installing, and Starting with SystemC 3(4)
2.1 Downloading and Installing SystemC
3(2)
Reference
5(2)
3 SystemC Simulation Kernel, Data Types, Communication Primitives Concurrency Control, and Main Language Constructs 7(6)
3.1 SystemC Language Details
7(5)
Reference
12(1)
4 Primitive Channels: Concurrency Control 13(12)
4.1 sc_signal and the Reader-Writer Model
13(4)
4.2 sc_mutex and Concurrency Control
17(3)
4.3 sc_semaphore and Concurrency Control
20(4)
References
24(1)
5 Modeling Combinational Logic Circuits, Implicit Events, Primitive Communication Channels and Combinations 25(54)
5.1 1-Bit Input-l-Bit Output Inverter
25(4)
5.2 4 1-Bit Input NAND Gate
29(5)
5.3 3-Bit Input Adder with 1-Bit Carry and 1-Bit Sum Output
34(6)
5.4 3-Bit Input Adder with Carry and Sum Output: Compound Data Types-Bit Vectors
40(3)
5.5 8 x 1 Multiplexer: Bit Only Input/Output and Bit Vector Input/Output
43(16)
5.6 Combinational Logic Blocks Connected in Series
59(6)
5.7 32-Bit Left/Right Barrel Shifter
65(7)
5.8 3-8 Decoder: Compound Data Types-Logic Vector
72(6)
References
78(1)
6 Modeling Sequential Logic Circuits, Implicit Events, Primitive Channels, and Their Combinations 79(106)
6.1 JK Master-Slave Flip-Flop
79(7)
6.2 64-Bit Serial-in Parallel-Out Shift Register
86(4)
6.3 64-Bit Asynchronous Counter (Ripple Counter)
90(3)
6.4 Simple Finite State Machine
93(5)
6.5 32-Bit Parity Generator for Forward Error Correction Module of IEEE 802.3ba Protocol
98(29)
6.6 Simple Pulse Counter for Rotary Encoder
127(4)
6.7 32 Bit x 32 Bit Input 64-Bit Output Booth Multiplier
131(8)
6.8 Decimal to IEEE 754-2008 Format 32-Bit Floating-Point Converter
139(7)
6.9 IEEE 754-2008 Format 32-Bit Floating-Point Number Addition
146(15)
6.10 IEEE 754-2008 Format 32-Bit Floating-Point Number Multiplication
161(5)
6.11 Simple 4-Bit Dual-Purpose Addition/Subtraction Module
166(16)
References
182(3)
7 Explicit SystemC Events: Notify-Wait 185(10)
7.1 Explicit SystemC Events and wait()/notify()
185(8)
Reference
193(2)
8 Hierarchical Combinational-Sequential System Design 195(158)
8.1 Pseudo-Random Number Generator
195(6)
8.2 Instruction Register-Level Scoreboard
201(33)
8.3 T2 256 x 132 Asynchronous Memory Array
234(1)
8.4 T2 64 x 45 Content Addressable Memory Array
234(1)
8.5 Triangle Wave Carrier, DC Modulator Pulse Width Modulation
234(44)
8.6 T2 Flip-Flop Bank
278(4)
8.7 Simple Custom Blocking Signal Interface and Channel
282(27)
8.8 Simple Moving Average Filter
309(1)
8.9 Level-Sensitive Scan: Clock Generator
309(3)
8.10 Level-Sensitive Scan: Reconfigurable D Flip-Flop
312(9)
8.11 Built-In Self-Test: Signature Analysis
321(5)
8.12 Simplified Built-In Logic Block Observation
326(26)
References
352(1)
9 Introduction to SystemC-AMS 353(4)
9.1 Introduction
353(2)
Reference
355(2)
10 Downloading, Installing, and Getting Started with SystemC-AMS 357(4)
10.1 How to Download and Install SystemC-AMS
357(3)
Reference
360(1)
11 SystemC-AMS Formalisms, Data Types, and Main Language Constructs 361(6)
11.1 Timed Data Flow
361(3)
11.2 Linear Signal Flow
364(1)
11.3 Electrical Linear Networks
365(1)
Reference
366(1)
12 Small Signal, Linear Domain, and Hybrid Models 367(2)
12.1 Small Signal Analysis
367(1)
Reference
368(1)
13 Timed Data Flow in Practice and Theory 369(30)
13.1 Fifth-Order Low-Pass Butterworths Filter
369(11)
13.2 Simple Single Slope Analog-to-Digital Converter
380(7)
13.3 Quadrature Phase-Shift Key Modulation
387(11)
References
398(1)
14 Linear Signal Flow in Practice and Theory 399(12)
14.1 Delta-Sigma Modulator
399(11)
References
410(1)
15 Electrical Linear Networks in Practice and Theory 411(16)
15.1 Fifth-Order Unity-Gain Low-Pass Butterworths Filter
411(7)
15.2 5.0 kHz Mid-frequency Bandpass Filter
418(3)
15.3 Simple CMOS Inverter
421(5)
References
426(1)
16 Real-World Electrical Linear Networks, Linear Signal Flow, and Timed Data Flow Combinations : 427(22)
16.1 Band-Pass Filter Second-Order Sigma-Delta Modulator
427(10)
16.2 Position-Sensitive Detector and CD-ROM Reader
437(10)
References
447(2)
17 SystemC-AMS and SystemC Combinations 449(8)
17.1 SystemC Discrete-Event Clock-Driven SystemC-AMS Demultiplexer
449(6)
Reference
455(2)
Index 457
Amal Banerjee is an Consulting engineer at US (Texas) and Kolkata based electronics companies.