|
1 Introduction to Field-Programmable Gate Arrays |
|
|
1 | (32) |
|
|
1 | (1) |
|
|
2 | (5) |
|
|
2 | (3) |
|
1.2.2 Lookup Tables (LUTs) |
|
|
5 | (2) |
|
|
7 | (1) |
|
1.3 Programming Environments |
|
|
7 | (19) |
|
|
7 | (9) |
|
|
16 | (5) |
|
|
21 | (5) |
|
|
26 | (7) |
|
1.4.1 Fixed Point Numbers |
|
|
29 | (1) |
|
1.4.2 Operations with 2' Complement Numbers |
|
|
30 | (1) |
|
1.4.3 Floating-Point Numbers |
|
|
31 | (2) |
|
|
33 | (28) |
|
2.1 A Brief History of VHDL |
|
|
33 | (1) |
|
|
33 | (3) |
|
2.3 Levels of Abstraction |
|
|
36 | (10) |
|
2.3.1 Behavioral Description |
|
|
36 | (3) |
|
2.3.2 Data Flow Description |
|
|
39 | (3) |
|
2.3.3 Structural Description |
|
|
42 | (4) |
|
2.4 Modules Description Examples |
|
|
46 | (15) |
|
2.4.1 Combinational Circuits |
|
|
46 | (5) |
|
2.4.2 Sequential Circuits |
|
|
51 | (10) |
|
3 Matlab-Simulink Co-Simulation |
|
|
61 | (16) |
|
3.1 Co-Simulation Active-HDL/Matlab-Simulink |
|
|
61 | (6) |
|
3.2 Co-Simulation Xilinx System Generator/Matlab-Simulink |
|
|
67 | (5) |
|
3.3 Co-Simulation Altera DSP Builder/Matlab-Simulink |
|
|
72 | (5) |
|
|
77 | (40) |
|
4.1 On Piecewise-Linear (PWL) Functions |
|
|
77 | (3) |
|
4.1.1 Saturated Function Series as PWL Function |
|
|
77 | (1) |
|
4.1.2 Chua's Diode as PWL Function |
|
|
78 | (1) |
|
4.1.3 Sawtooth as PWL Function |
|
|
79 | (1) |
|
4.2 On the Simulation of Chaos Generators for FPGA Implementation |
|
|
80 | (4) |
|
4.2.1 One-Step Methods for Simulating the Generation of 2-Scrolls |
|
|
82 | (2) |
|
4.3 Symmetric and Nonsymmetric PWL Functions |
|
|
84 | (8) |
|
4.3.1 Symmetric PWL Function |
|
|
85 | (2) |
|
4.3.2 Nonsymmetric PWL Function |
|
|
87 | (1) |
|
4.3.3 VHDL Simulation and Computer Arithmetic Issues |
|
|
87 | (5) |
|
|
92 | (2) |
|
|
94 | (1) |
|
4.6 Multi-scroll Chaotic Attractors with High MLE and Entropy |
|
|
94 | (17) |
|
|
103 | (6) |
|
4.6.2 Evaluation of Entropy |
|
|
109 | (2) |
|
4.7 Generating a 50-Scrolls Chaotic Attractor at 66 MHz |
|
|
111 | (6) |
|
5 Artificial Neural Networks for Time Series Prediction |
|
|
117 | (34) |
|
|
117 | (1) |
|
5.2 Generating Chaotic Time Series Using FPGAs |
|
|
118 | (3) |
|
|
121 | (12) |
|
5.3.1 ANN Topology Selection |
|
|
124 | (2) |
|
|
126 | (3) |
|
5.3.3 Weights Updating by Batches and Incremental Methods |
|
|
129 | (2) |
|
5.3.4 On the Activation Function in the Last Layer of the ANN |
|
|
131 | (1) |
|
5.3.5 Time Series Prediction of Chaotic Signals with Different MLE |
|
|
132 | (1) |
|
5.4 FPGA-Based ANN for Time-Series Prediction of Chaotic Signals |
|
|
133 | (11) |
|
5.4.1 FPGA Realization of the Hyperbolic Tangent Activation Function |
|
|
133 | (11) |
|
5.5 Serial Communication Protocol: PC-FPGA |
|
|
144 | (7) |
|
6 Random Number Generators |
|
|
151 | (22) |
|
6.1 Generating Pseudorandom Binary Sequences |
|
|
151 | (1) |
|
6.2 Numerical Method for Solving a Chaotic Dynamical System |
|
|
151 | (1) |
|
6.3 Double-Scroll and Multi-scroll Chaos Generators |
|
|
152 | (3) |
|
6.3.1 Chua's Chaotic Oscillator |
|
|
152 | (1) |
|
6.3.2 Saturated Function Series-Based Chaotic Oscillator |
|
|
153 | (2) |
|
6.4 Measuring the Entropy of a RNG |
|
|
155 | (2) |
|
|
157 | (1) |
|
|
157 | (16) |
|
7 Secure Communication System |
|
|
173 | (32) |
|
7.1 Chaotic Secure Communication Systems |
|
|
173 | (1) |
|
7.2 Hamiltonian Synchronization Approach |
|
|
174 | (2) |
|
7.3 Synchronization of Multi-scroll Chaotic Attractors |
|
|
176 | (3) |
|
7.4 Synchronization of 2D-4-Scroll Chaos Generators |
|
|
179 | (3) |
|
7.5 Synchronization of 3D-4-Scroll Chaos Generators |
|
|
182 | (2) |
|
7.5.1 Numerical Simulation Results |
|
|
184 | (1) |
|
7.6 Image Transmission Through a Chaotic Secure Communication System |
|
|
184 | (21) |
|
7.6.1 Multi-scroll Chaos Generators Based on PWL Functions |
|
|
185 | (5) |
|
|
190 | (1) |
|
7.6.3 Master-Slave Synchronization |
|
|
191 | (3) |
|
|
194 | (11) |
|
8 Challenges in Engineering Applications |
|
|
205 | (10) |
|
8.1 On the Length of the Digital Words |
|
|
205 | (5) |
|
8.1.1 Example of a Design with the Lorenz System |
|
|
205 | (1) |
|
8.1.2 Variables Range Determination |
|
|
206 | (1) |
|
8.1.3 Number of Bits in the Integer Part |
|
|
207 | (1) |
|
8.1.4 Fixed Point Implementation |
|
|
208 | (2) |
|
|
210 | (5) |
References |
|
215 | (6) |
Index |
|
221 | |