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El. knyga: Engineering Applications of FPGAs: Chaotic Systems, Artificial Neural Networks, Random Number Generators, and Secure Communication Systems

  • Formatas: PDF+DRM
  • Išleidimo metai: 28-May-2016
  • Leidėjas: Springer International Publishing AG
  • Kalba: eng
  • ISBN-13: 9783319341156
  • Formatas: PDF+DRM
  • Išleidimo metai: 28-May-2016
  • Leidėjas: Springer International Publishing AG
  • Kalba: eng
  • ISBN-13: 9783319341156

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This book offers readers a clear guide to implementing engineering applications with FPGAs, from the mathematical description to the hardware synthesis, including discussion of VHDL programming and co-simulation issues. Coverage includes FPGA realizations such as: chaos generators that are described from their mathematical models; artificial neural networks (ANNs) to predict chaotic time series, for which a discussion of different ANN topologies is included, with different learning techniques and activation functions; random number generators (RNGs) that are realized using different chaos generators, and discussions of their maximum Lyapunov exponent values and entropies.Finally, optimized chaotic oscillators are synchronized and realized to implement a secure communication system that processes black and white and grey-scale images. In each application, readers will find VHDL programming guidelines and computer arithmetic issues, along with co-simulation examples with Active-HD

L and Simulink.The whole book provides a practical guide to implementing a variety of engineering applications from VHDL programming and co-simulation issues, to FPGA realizations of chaos generators, ANNs for chaotic time-series prediction, RNGs and chaotic secure communications for image transmission.

Introduction to field programmable gate arrays.- VHDL.- Matlab-Simulink Co-simulation.- Chaos generators.- Artificial neural networks for time series prediction.- Random number generators.- Secure communication system.- Challenges in engineering applications.
1 Introduction to Field-Programmable Gate Arrays
1(32)
1.1 FPGA Architectures
1(1)
1.2 Blocks Description
2(5)
1.2.1 Logic Blocks
2(3)
1.2.2 Lookup Tables (LUTs)
5(2)
1.2.3 I/O Blocks
7(1)
1.3 Programming Environments
7(19)
1.3.1 Vivado
7(9)
1.3.2 Quartus II
16(5)
1.3.3 Aldec Active-HDL
21(5)
1.4 Computer Arithmetic
26(7)
1.4.1 Fixed Point Numbers
29(1)
1.4.2 Operations with 2' Complement Numbers
30(1)
1.4.3 Floating-Point Numbers
31(2)
2 VHDL
33(28)
2.1 A Brief History of VHDL
33(1)
2.2 VHDL Structure
33(3)
2.3 Levels of Abstraction
36(10)
2.3.1 Behavioral Description
36(3)
2.3.2 Data Flow Description
39(3)
2.3.3 Structural Description
42(4)
2.4 Modules Description Examples
46(15)
2.4.1 Combinational Circuits
46(5)
2.4.2 Sequential Circuits
51(10)
3 Matlab-Simulink Co-Simulation
61(16)
3.1 Co-Simulation Active-HDL/Matlab-Simulink
61(6)
3.2 Co-Simulation Xilinx System Generator/Matlab-Simulink
67(5)
3.3 Co-Simulation Altera DSP Builder/Matlab-Simulink
72(5)
4 Chaos Generators
77(40)
4.1 On Piecewise-Linear (PWL) Functions
77(3)
4.1.1 Saturated Function Series as PWL Function
77(1)
4.1.2 Chua's Diode as PWL Function
78(1)
4.1.3 Sawtooth as PWL Function
79(1)
4.2 On the Simulation of Chaos Generators for FPGA Implementation
80(4)
4.2.1 One-Step Methods for Simulating the Generation of 2-Scrolls
82(2)
4.3 Symmetric and Nonsymmetric PWL Functions
84(8)
4.3.1 Symmetric PWL Function
85(2)
4.3.2 Nonsymmetric PWL Function
87(1)
4.3.3 VHDL Simulation and Computer Arithmetic Issues
87(5)
4.4 VHDL Code Generation
92(2)
4.5 Bifurcation Diagrams
94(1)
4.6 Multi-scroll Chaotic Attractors with High MLE and Entropy
94(17)
4.6.1 Lyapunov Exponents
103(6)
4.6.2 Evaluation of Entropy
109(2)
4.7 Generating a 50-Scrolls Chaotic Attractor at 66 MHz
111(6)
5 Artificial Neural Networks for Time Series Prediction
117(34)
5.1 Introduction
117(1)
5.2 Generating Chaotic Time Series Using FPGAs
118(3)
5.3 ANN Design Issues
121(12)
5.3.1 ANN Topology Selection
124(2)
5.3.2 ANN Training
126(3)
5.3.3 Weights Updating by Batches and Incremental Methods
129(2)
5.3.4 On the Activation Function in the Last Layer of the ANN
131(1)
5.3.5 Time Series Prediction of Chaotic Signals with Different MLE
132(1)
5.4 FPGA-Based ANN for Time-Series Prediction of Chaotic Signals
133(11)
5.4.1 FPGA Realization of the Hyperbolic Tangent Activation Function
133(11)
5.5 Serial Communication Protocol: PC-FPGA
144(7)
6 Random Number Generators
151(22)
6.1 Generating Pseudorandom Binary Sequences
151(1)
6.2 Numerical Method for Solving a Chaotic Dynamical System
151(1)
6.3 Double-Scroll and Multi-scroll Chaos Generators
152(3)
6.3.1 Chua's Chaotic Oscillator
152(1)
6.3.2 Saturated Function Series-Based Chaotic Oscillator
153(2)
6.4 Measuring the Entropy of a RNG
155(2)
6.5 NIST Measurements
157(1)
6.6 Different RNGs
157(16)
7 Secure Communication System
173(32)
7.1 Chaotic Secure Communication Systems
173(1)
7.2 Hamiltonian Synchronization Approach
174(2)
7.3 Synchronization of Multi-scroll Chaotic Attractors
176(3)
7.4 Synchronization of 2D-4-Scroll Chaos Generators
179(3)
7.5 Synchronization of 3D-4-Scroll Chaos Generators
182(2)
7.5.1 Numerical Simulation Results
184(1)
7.6 Image Transmission Through a Chaotic Secure Communication System
184(21)
7.6.1 Multi-scroll Chaos Generators Based on PWL Functions
185(5)
7.6.2 FPGA Realization
190(1)
7.6.3 Master-Slave Synchronization
191(3)
7.6.4 FPGA Realization
194(11)
8 Challenges in Engineering Applications
205(10)
8.1 On the Length of the Digital Words
205(5)
8.1.1 Example of a Design with the Lorenz System
205(1)
8.1.2 Variables Range Determination
206(1)
8.1.3 Number of Bits in the Integer Part
207(1)
8.1.4 Fixed Point Implementation
208(2)
8.2 Current Challenges
210(5)
References 215(6)
Index 221
Esteban Tlelo-Cuautle received a B.Sc. degree from Instituto Tecnológico de Puebla México in 1993. He then received both M.Sc. and Ph.D. degrees from Instituto Nacional de Astrofķsica, Óptica y Electrónica (INAOE) México in 1995 and 2000, respectively. From 2001 he is appointed as Tenure Professor at INAOE. He has authored or edited 13 books and more than 250 works published in book chapters, journals and conferences. He serves as Associate Editor in IEEE Transactions on Circuits and Systems I: Regular Papers (2016-2017), Integration - the VLSI Journal (2013-2016), and IEEE Transactions on Circuits and Systems II: Express Briefs (2014-2015). He has been Technical Program Committee member of major conferences in the areas of circuits and systems (CAS). His research interests include modeling, design and synthesis of integrated CAS, design and applications of chaotic systems, CAS optimization by heuristics, symbolic analysis and analog/RF and mixed-signal design automationtools.





Jose de Jesus Rangel-Magdaleno received the B.E. degree in electronics engineering and the M.E. degree in electrical engineering on hardware signal processing from Universidad de Guanajuato, Mexico in 2006 and 2008, respectively. He received the Ph.D. degree in mechatronics from the Universidad Autonoma de Queretaro, Mexico in 2011. He is currently Titular Researcher at the Electronics Department at INAOE, Mexico. He has authored 20 journal articles and 21 conferences papers. He is a member of the Mexican national research system (SNI), level 1. His research interests include FPGAs, signal and image processing, instrumentation and mechatronics.







Luis Gerardo de la Fraga received the B.Sc. degree from the Veracruz Institute of Technology, Mexico, in 1992, the M.Sc. degree from the National Institute of Astrophysics, Optics and Electronics, Mexico, in 1994, in Electrical Engineering; and the Ph.D. degree from the Autonomous University ofMadrid, Spain, in 1998 in Informatics Engineering. From 1998 to 2000, he was Assistant Professor in the Autonomous University of Morelos State, in Cuernavaca, Mexico. Since 2000, he is working as researcher scientist at Cinvestav in the Computer Science Department in Mexico City. His research interests include computer graphics, computer vision, image processing, optimization, network security, and he is very enthusiastic of open-source software and GNU/Linux systems. He has authored more tan fifty technical articles published in journals, book chapters, and international conference proceedings. Dr. De la Fraga is member of IEEE and ACM since 2005.